WILSONVILLE, Ore.--(BUSINESS WIRE)-- Mentor Graphics Corp. (NAS: MENT) today announced IC physical design, verification, thermal analysis and test design tools that have been selected for TSMC's new ...

WILSONVILLE, Ore.--(BUSINESS WIRE)-- Mentor Graphics Corp. (NAS: MENT) today announced new capabilities to complement TSMC's 20nm manufacturing processes. Enhancements to support both digital and ...

Mentor Graphics Corp. has announced the Questa® Multi-view Verification Components product and the inFact™ intelligent testbench automation tool – two new solutions that use breakthrough technologies ...

WILSONVILLE, Ore., March 1, 2011 - Mentor Graphics Corp. (NASDAQ: MENT) today announced that it has embarked on a corporate-wide strategy aimed at transforming the integration and functional ...

Cadence Design Systems (www.cadence.com) and Mentor Graphics (www.mentor.com) have agreed to standardize on an open source methodology for verifying SystemVerilog design files. Cadence Design Systems ...

WILSONVILLE, Ore., April 15, 2014-- Mentor Graphics Corp. (NASDAQ: MENT) today announced that its IC design to silicon solution has achieved certification for TSMC's Design Rule Manual (DRM) and SPICE ...

Customers and ecosystem partners are expanding use of the Calibre® Pattern Matching solution to overcome complex integrated circuit (IC) verification and manufacturing problems. The solution ...

VC Formal Datapath Validation application delivers over 100X speed-up in formal verification between a reference C/C++ algorithm and RTL design implementation over conventional techniques The new app ...

Enabling designers to perform block and cell physical verification from within layout environments such as Cadence's Virtuoso is Mentor Graphics' Calibre Interactive. This latest version in a ...

Over the years, new techniques, technologies and design tools have been brought to market with the explicit intent of simplifying design verification. Despite these efforts verification still manages ...